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Keynote Speakers

 

John Impagliazzo (Hofstra University)

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Bio: Professor Emeritus John Impagliazzo has supported many educational computing activities over decades. His accomplishments include eighteen books, contributions to model computing and engineering curricula, efforts to encourage diversity in the field, promoting computing ethics, and developing a history of computing. His professional services enhanced engineering and computer science education through accreditation, curricula development, conference leadership, and mentoring of colleagues.

Dr. Impagliazzo represented the IEEE Computer Society on the 2004 Computer Engineering Task Force where he served as a principal co-author and as editor of the IEEE/ACM Computer Engineering Curriculum Report (CE2004). In addition, he was an active participant on the task force that produced the ACM/IEEE Computing Curricula 2005 Report (CC2005), also known as the “Overview Report”. These documents have been very influential in the development of computer science and engineering programs worldwide. Currently, he is the ACM lead on revising the CE2004 report.

Impagliazzo serves as the Editor-in-Chief of the magazine ACM Inroads and he served as the Editor- in-Chief of the SIGCSE Bulletin (a publication of the ACM Special Interest Group on Computer Science Education), positions he held continuously since 1997. He is an associate editor of the five-volume Wiley Encyclopedia on “Computer Science and Engineering”, published in 2009.

Impagliazzo also championed diversity in computing education. In June of 2002, he developed a special issue of the SIGCSE Bulletin on “Women and Computing”. Impagliazzo helped to generate sufficient funds for this effort, which enabled the distribution of over 24,000 copies of the issue worldwide. Three years later, in cooperation with ACM, IEEE, and the IEEE Computer Society, he developed a special CD called “Pathways: Women and Computing” that contained a compendium of articles that had appeared in the Communications of ACM, in ACM’s SIGCSE Bulletin, and the IEEE Annals of the History of Computing.

Impagliazzo chaired the International Federation for Information Processing (IFIP) Working Group 9.7 on the History of Computing from 2001 to 2007. He edited or co-edited conference proceedings from various conferences on the history of computing and education resulting in seven books. The last two of these are the History of Nordic Computing 3 (HiNC3) and Perspectives on Soviet and Russian Computing.

The book on Soviet computing contains writings of many of the computing pioneers from the Former Soviet Union. Its importance comes from the fact that these pioneers used to work under a shroud of secrecy and little communication existed between them. Impagliazzo generated significant financial support to help support Soviet computing pioneers and academicians attend a weeklong conference he organized on “Soviet and Russian Computing” (SoRuCom) in Petrozavodsk, Russia. Because of the event, many of these individuals were finally able to speak openly about the secret work they once did.

For more than two decades, Impagliazzo has served the computing and engineering professions. He was an active participant in two-year college issues and chaired the ACM Two-Year College Committee from 1988 to 1991, where he helped generate funds to develop and publish five curricular reports for associate-degree programs. For one of these, the “Computing and Engineering Technology Report”, he was its principal author.

From 1991 to 2003, Impagliazzo chaired the ACM Accreditation Committee. This committee recruited and selected hundreds of program evaluators for CSAC (formerly Computer Science Accreditation Commission) and later for the Computing Accreditation Commission (CAC) of ABET. John is now an ABET program evaluator for computing and for engineering programs; he was a CSAC program evaluator and team chair for almost twenty-five years. Additionally, he was an ABET/CSAC trainer for program evaluator candidates for three years. As an official evaluator for various accrediting agencies or as an expert consultant, Impagliazzo has evaluated well over sixty computing and engineering programs worldwide.

Impagliazzo organized the conference on the Legacy of John von Neumann in 1988; among the high profile speakers were Nobel Laureates and members of the National Academy of Science. He also chaired the 1996 ACM SIGCSE Symposium. Highlights of the event included the symbolic restarting of the ENIAC computer for its 50th anniversary and the chess match between world champion Garry Kasparov and IBM’s “Deep Blue” computer. In 2010, he co-chaired the Innovation and Technology in Computer Science Education (ITiCSE) conference in Ankara, Turkey, and he organized a special ACM Workshop in Doha, Qatar. While in Qatar, he was one of the individuals responsible for developing the Qatar Assistive Technology Center, known also as the Mada Center.

Impagliazzo is a Life Fellow of IEEE, a Distinguished Educator of ACM, and a Fellow of CSAB. He was a member of the IEEE History Committee for six years, serving as treasurer, chairing its strategic planning subcommittee and its finance subcommittee. He participated in a special IEEE committee to review the IEEE History Center and its Virtual Museum. He is a member of the Board of Directors of the IEEE Foundation. He is also a member of the ACM Education Board and the ACM Education Council. 

Tim Kelly (University of York)

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Bio: My research is concerned with the modelling, analysis, justification and certification of complex (computer-based) systems. In particular, I have established a body of work on safety case development that has had, and continues to have, national and international impact. Safety cases are the means by which safety-critical systems are assured and regulated to be acceptably safe in a wide-variety of domains (medical, defence, rail, automotive, chemical, nuclear, aerospace).
 
I have published extensively on the topic of safety case development, and advised many companies, organisations and authorities from around the world on the topic of safety case development. These have included Statoil, NASA, the Civil Aviation Authority, the US Food and Drugs Agency (FDA), the UK Government, NHS Connecting for Health, QinetiQ, BAE Systems, Rolls-Royce Network Rail (Railtrack), Siemens and the UK government-funded Nimrod Review (led by Charles Haddon-Cave QC).
 
At York I have been responsible for developing the Goal Structuring Notation (a notation to support argumentation within safety cases) to the point at which it could be readily adopted and applied by industry. It is now in extensive use worldwide. For example, it is currently a favoured approach of the UK Railway Safety and Standards Board, the European Air Traffic Management Organisation Eurocontrol, the US FDA for medical device safety cases, and is being used in the Lockheed Martin F35 Lightning safety case. My papers are directly referenced by a number of international safety standards, such as the US FDA 510K regulations on medical devices, and the new ISO 26262 Standard for Automotive Safety. Our work on modular safety case development has been adopted as the basis underpinning a multi-million pound programme of research on modular and incremental certification funded by the UK MoD and undertaken by an industry consortium (the Industrial Avionics Working Group) over the last nine years.
 
I have led research into the safety and dependability of Systems of Systems (SoS); the safety of autonomous systems (such as Unmanned Aerial Vehicles); the application of assurance cases to the security domain; and the safety of healthcare systems (including health informatics).
 
I have previously been the Deputy Director of the Rolls-Royce UTC in Systems and Software Engineering, Theme Leader for the Dependability Work within the MoD-funded Software Systems Engineering Initiative and Safety Topic Leader for the BAE Systems Dependable Computing Systems Centre.
 
I have also been recognised as an international expert in system safety as part of the Discipline Innovation Wisdom Base project, funded by Beijing Jiaotong Transportation University.
 
My primary motivation has been, and continues to be, for our research work to have real impact.
Herbert Bos (Vrije Universiteit Amsterdam)

Talk: The Bug that Bites:  On vulnerabilities, defenses, and ways around them

Abstract: In this presentation, I will first explain some of our work in the area of recent botnet takedowns. Taking down state of the art botnets has become very hard and may be nigh impossible in the future-at least if we want to stay within the boundaries of the law. So let us turn to the vulnerabilities that allow attackers to compromise our systems. Contrary to popular belief, there are only a few classes of security bugs and a handful of techniques that attackers use to compromise a binary: buffer overflows, dangling pointers, format strings and a few others but not that many. To stop attackers from exploiting this small set of vulnerability classes, researchers have invented a plethora of defenses. So far, none of them have succeeded in keeping the attackers out. In this talk, I will talk about vulnerabilities and a new way to find them in binaries. I will also discuss defenses and the need for a program of rigorous evaluation of their strengths and merits. I will illustrate the talk with some of the attack work we have done in recent years.

Bio: Herbert Bos is a professor of Systems and Network Security at Vrije Universiteit Amsterdam in the Netherlands. He obtained his Ph.D. from Cambridge University Computer Laboratory (UK). Coming from a systems background, he drifted into security a few years ago and never left. He is very proud of his (former) students, three of whom have won the Roger Needham Ph.D. Award for best Ph.D. thesis in systems in Europe. Herbert is also one of the authors of the Dutch Cyber Security Research Agenda and the first computer scientist in the Netherlands to be awarded an ERC Starting Grant (for a project on reverse engineering in 2011) and a VICI grant (to dowse for vulnerabilities in 2014) -- both of which are currently keeping him busy. He published his work on OSs, attacks, defenses,  have He claims that his life would be  happier if he found an additional postdoc to hire (so if this is you, do apply!).

Hermann Kopetz (Vienna University of Technology)

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Talk: The Time-Triggered Architecture
Abstract: The Time-Triggered Architecture (TTA) provides a computing infrastructure for the design and implementation of dependable distributed embedded systems, such as automotive or aerospace applications. A large real-time application is decomposed into nearly autonomous  clusters and nodes, and a fault-tolerant global time base of known precision is generated at every node. In the TTA, this global time is used to precisely specify the interfaces among the nodes, to simplify the communication and agreement protocols, to perform prompt error detection, and to guarantee the timeliness of real-time applications. The TTA supports a two-phased design methodology, architecture design, and component design. During the architecture design phase, the interactions among the distributed components and the interfaces of the components are fully specified  in the value  domain  and  in the  temporal  domain.  In the succeeding component implementation phase, the components  are built, taking  these  interface  specifications  as constraints.  This two-phased design methodology is a prerequisite for the composability of applications implemented in the TTA and for the reuse of pre-validated  components  within the TTA. This talk presents the architecture model of the TTA, explains the design rationale, discusses the time-triggered communication  protocols  TTP/C and TT-Ethernet,  and illustrates  how transparent fault tolerance can be implemented in the TTA.
 
Bio:  Hermann Kopetz received his PhD degree in physics "sub auspiciis praesidentis" from the University of Vienna, Austria in 1968. He was a manager of a computer process control department at Voest Alpine in Linz, Austria, before accepting an appointment as a Professor for Computer Process Control at the Technical University of West-Berlin. Since 1982 he has been professor for Real-Time Systems at the Vienna University of Technology, Austria.

From 1990 to 1992 Kopetz was chairman of the IEEE Technical Committee on Fault-Tolerant Computing and was elected to the grade of a “Fellow of the IEEE” in 1993. Dr. Kopetz was the Chairman of the IFIP WG 10.4 on Dependable Computing and Fault-Tolerance from 1996 to 1998. In 1998 he was elected to become a full member of the Austrian Academy of Science. Dr. Kopetz has been a Visiting Professor at the University of California at Irvine in 1993 and at St. Barbara in 1996.  Dr. Kopetz is one of the founders of the spin-off company TTTech, established in 1998. From July 2000 to July 2005 Dr. Kopetz served as an advisor for the Austrian Government on Science Policy. Dr. Kopetz received the IEEE Computer Society 2003 Technical Achievement Award with the citation: For outstanding contributions to the field of safety-critical real-time computing. In 2007 Dr. Kopetz received the "Docteur honoris causa" from the Universitè Paul Sabatier, Toulouse. In December 2007 Dr. Kopetz was awarded the technical achievement award  of the IEEE TC on Real-Time Systems. For the period 2007 - 2009 Dr. Kopetz is member of the IST Advisory Group, the Advisory Group for the ICT theme in FP7. Furthermore, he serves as chairman for the Scientific Board of the Embedded Systems Institute (Eindhoven, NL) and for the Scientific Board of ARC (Seibersdorf, A). Dr Kopetz has published a widely used textbook on Real-Time Systems and more than 150 papers on the topic of dependable embedded systems.  He holds more than thirty patents.

Dr. Kopetz' research interests focus at the intersection of real-time systems, fault-tolerant systems, and distributed systems. He is the chief architect of the Time-Triggered Protocol (TTP) for distributed fault-tolerant real-time systems, which evolved out of the MARS project at the Technical University of Vienna. In the last few years, Dr. Kopetz and his research group work in the field of automotive and aerospace electronics. He is presently involved in two large EC funded research projects, namely the FP6 Integrated Project DECOS and the FP6 Network of Excellence ARTIST2.

Nikil Dutt (University of Califórnia)

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Bio: Nikil D. Dutt is a Chancellor’s Professor at the University of California, Irvine, with academic appointments in the CS, EECS, and Cognitive Sciences departments.  He received a B.E.(Hons) in Mechanical Engineering from the Birla Institute of Technology and Science, Pilani, India in 1980, an M.S. in Computer Science from the Pennsylvania State University in 1983, and a Ph.D. in Computer Science from the University of Illinois at Urbana-Champaign in 1989. He is affiliated with the following Centers at UCI: Center for Embedded Computer Systems (CECS), Center for Cognitive Neuroscience and Engineering (CENCE), California Institute for Telecommunications and Information Technology (Calit2), the Center for Pervasive Communications and Computing (CPCC), and the Laboratory for Ubiquitous Computing and Interaction (LUCI).

Professor Dutt’s research interests are in embedded systems, electronic design automation, computer architecture, optimizing compilers, system specification techniques, distributed systems, formal methods, and brain-inspired architectures and computing. He is a coauthor of seven books: "High-Level Synthesis: Introduction to Chip and System Design", Kluwer Academic Publishers, 1992, "Memory Issues in Embedded Systems-on-Chip: Optimizations and Exploration", Kluwer Academic Publishers, 1999, "Memory Architecture Exploration for Programmable Embedded Systems", Kluwer Academic Publishers, 2003, "SPARK: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits", Kluwer Academic Publishers, 2004, "Functional Validation of Programmable Embedded Architectures: A Top-Down Approach", Springer-Verlag, 2005, “On-chip Communication Architectures: Current Practice, Research and Future Trends,” Morgan Kaufman/Elsevier Systems-on-Silicon Series, 2008, and “Processor Description Languages: Applications and Methodologies,” Morgan Kaufman/Elsevier Systems-on-Silicon Series, 2008.

Professor Dutt’s research has been recognized by Best Paper Awards at the following conferences: CHDL’89, CHDL’91, VLSI Design 2003, CODES+ISSS 2003, CNCC 2006, ASPDAC 2006, IJCNN 2009, and DATE 2012; and Best Paper Award Nominations at: WASP 2004, DAC 2005, VLSI Design 2006, and CASES 2011.  He has also received a number of departmental and campus awards for excellence in teaching at UC Irvine.

Professor Dutt currently serves as Associate Editor of ACM Transactions on Embedded Computer Systems (TECS) and of IEEE Transactions on VLSI Systems (TVLSI). He served as Editor-in-Chief of ACM Transactions on Design Automation of Electronic Systems (TODAES) between 2004-2008. He was an ACM SIGDA Distinguished Lecturer during 2001-2002, and an IEEE Computer Society Distinguished Visitor for 2003-2005.  He has served on the steering, organizing, and program committees of several premier CAD and Embedded System conferences and workshops.  His recent major conference activity includes: ESWeek Steering Committee Chair and TPC Co-Chair DAC-2010/2011. He currently serves on, or has served on the ACM Publications Board, the advisory boards of ACM SIGBED, ACM SIGDA, and IFIP WG 10.5. He is a Fellow of the IEEE, an ACM Distinguished Scientist, and an IFIP Silver Core awardee.