Keynote Speakers
Scott Brandt
Dr. Scott A. Brandt is Professor of Computer Science at the University of California, Santa Cruz. He is also Director of the UCSC Systems Research Laboratory, co-founder of the UCSC Storage Systems Research Center and, co-founder and Director of the UCSC/Los Alamos Institute for Scalable Scientific Data Management. Dr. Brandt's specialized in Storage Systems and Real-Time Systems and, more recently, System and Storage Performance Management. His real-time research focuses on integrating real-time and non-real-time processing into a uniform processing environment.
Keynote: Managing the Performance of Large, Distributed Systems (PDF)
Date: November 7th, 09:00 – 10:30
Abstract: Real-time control and performance guarantees have traditionally been implemented in isolated purpose-built systems. New applications and systems demand performance guarantees in open, shared, distributed environments where not everything is known a priori and many unrelated applications may be competing for resources. This talk explores the problem of guarantees in open, distributed systems, presents a few examples of such systems, and discusses research at UC Santa Cruz aimed at addressing the problem.
Gernot Heiser
Dr. Gernot Heiser is Scientia Professor and John Lions Chair of Operating Systems at the School of Computer Science and Engineering, the University of New South Wales, Sydney, Australia, leader of ERTOS, the Embedded Operating Systems Research Group at NICTA, Australia’s Information and Communications Technology Research Center of Excellence, and founder and director of Open Kernel Labs (OK Labs), the global leader virtualisation technology for embedded systems. Dr. Heiser's primary occupation is to lead the ERTOS team at NICTA in its endeavor to bring about a qualitative change in embedded systems practice, making trusted systems truly trustworthy.
Keynote: Towards Trustworthy Systems orThe Continued Relevance of OS Research
Date: November 9th, 09:00 – 10:30
Abstract: Computer systems are routinely deployed in life- and mission- critical situations, yet in most cases their security, safety or dependability cannot be assured to the degree warranted by the application. In other words, trusted computer systems are rarely trustworthy.
We believe that this is highly unsatisfactory, and have embarked on a research program aimed at bringing reality in line with expectations. In this talk describes NICTA’s research agenda for achieving true trustworthiness in systems. The approach combines systems with formal methods and is based on establishing the trustworthiness of the lowest level of software, a small microkernel or hypervisor, and then using this platform to provide guarantees to complete systems built on top. A number of important steps in this direction have been achieved, specifically the formal proof of functional correctness of a complete OS microkernel, and subsequently the establishment of further properties, including timeliness and integrity enforcement. Work is progressing on making dependability guarantees for complete real-world systems, comprising millions of lines of code.
Andreas Gerstlauer
Andreas Gerstlauer is an Assistant Professor in Electrical and Computer Engineering at the University of Texas at Austin. He received a Dipl.-Ing. degree in Eletrical Engineering from the University of Stuttgart, Germany in 1997 and M.S. and Ph.D. degrees in Information and Computer Science from the University of California, Irvine (UCI) in 1998 and 2004, respectively. Prior to joining UT Austin in 2008, he was an Assistant Researcher in the Center for Embedded Computer Systems (CECS) at UC Irvine, leading a research group to develop electronic system-level (ESL) design tools. Commercial derivatives of such tools are in use at the Japanese Aerospace Exploration Agency (JAXA) and NEC Toshiba Space Systems among others. Dr. Gerstlauer is co-author on 3 books and more than 45 conference and journal publications, and he has presented in numerous conference and industrial tutorials. Dr. Gerstlauer's research interests includes system-level design automation, system modeling, design languages and methodologies, and embedded hardware and software synthesis.
Keynote: Software Synthesis for Embedded Multicore Systems (PDF)
Date: November 8th, 09:00 – 10:30
Abstract: The continued exponential increase in embedded system complexities, driven by both technological advances and ever growing application demands, has led to system designs that incorporate more and more processing cores, often on a single chip. Furthermore, their application-specific nature and operation under tight power, real-time, reliability and cost constraints gives us both the opportunity and need to develop highly optimized, heterogenenous and customized solutions. At the same time, prohibitive hardware design and manufacturing costs increasingly ask for programmable platforms in which most of the functionality, optimality and differentiation is delivered through embedded software running on a heterogenenous multi-core and multi-processor architecture. Together, complexity and heterogeneity challenges clearly make traditional embedded software development practices infeasible, and embedded software is rapidly becoming the bottleneck for meeting performance, power, cost, reliability and time-to-market/productivity constraints. Existing approaches for manual progamming of individual processors directly at a low level close to hardware will not scale to tens or hundreds of cores and novel embedded software development methodologies are urgently needed.
In this tutorial, we aim to provide a comprehensive introduction to state-of-the-art techniques for automated synthesis of embedded multi-core/-processor software from high-level, abstract input specifications. Key to the automation of any design process are appropriate and effective models. On the one hand, this includes the search for the right parallel and real-time programming models at the input of the synthesis process. We will discuss various models of computation (MoCs) in terms of their support for concurrency and communication, including implications on expressability and synthesizability. On the other hand, at the output of the design flow, there is a need for fast and accurate virtual prototypes that allow
for efficient pre-silicon validation of the effects of design decisions on system implementations. We will present an overview of platform modeling and simulation at varying levels of abstraction based on transaction-level models (TLMs) of communication and host-compiled or instruction-set simulation of software execution. Lastly, the tutorial will describe how models can be integrated into a seamless, automated synthesis flow that includes optimized mapping of applications onto architectures, rapid and early exploration of the design space and fully automatic generation of platform target code down to the synthesis of complete hardware-dependent software (HdS) stacks.
Dilma da Silva
Dilma da Silva is a researcher at the IBM T. J. Watson Research Center, in New York. She manages the Advanced Operating Systems group and is also Principal Investigator in the Exascale Collaboratory in Ireland. She received her Ph.D in Computer Science from Georgia Tech in 1997. Prior to joining IBM, she was an Assistant Professor at University of Sao Paulo, Brazil. Her research in operating systems addresses the need for scalable and customizable system software. Her current focus is on cloud computing. She has published more than 70 technical papers. Dilma is a member of the board of CRA-W (Computer Research Association's Committee on the Status of Women in Computing Research), of the CDC (Coalition for Diversifying Computing), a co-founder of the Latinas in Computing group, and treasurer/secretary for ACM SIGOPS. More information is available at www.research.ibm.com/people/d/dilma
Keynote Current Trends in Operating Systems Research (november-8th, 14:00 – 14:45)
Abstract: Nesta palestra serão discutidas algumas das novidades apresentadas na conferência ACM SOSP (Symposium on Operating Systems Principles) que ocorreu em final de outubro.