Dr. Franke is a Research Staff Member and manager in the Scalable Systems Department at the Thomas J. Watson Research Center. He received a Diplom degree in Computer Science from the Technical University of Karlsruhe, Germany, in 1987, and a M.S. and Ph.D. degrees in electrical engineering from Vanderbilt University in 1989 and 1992, respectively. He subsequently joined IBM at the Thomas J. Watson Research Center, where he worked on the IBM SP1/2 MPI subsystem, scalable operating systems, Linux scalability and enterprise readiness, multi-core architectures, and scalable applications. He was a principal architect of the PowerEN architecture. He is currently applying his system expertise to cloud architectures and business analytics applications. He received several IBM Outstanding Innovation Awards for his work. He is an author or coauthor of more than 100 technical papers and 30 patents. He is a Member of the IBM Academy of Science and an IBM Master Inventor. He also serves as an Adjunct Professor for Computer Science at NYU, New York City, with focus on operating systems and computer architecture.
The talk describes a series of system research projects from conception to their current status and how they shaped and are shaping our system designs. The first part will focus on Dynamic Logical Partitioning that has evolved into the primary virtualization technique on enterprise Power systems. DLPar technology now enables several new operating system projects such as automatic operating system repair, automatic SMT enabling and cloud computing. The second part of the talk will describe storage projects and how they enable scalable enterprise services. The final part will describe on how a detailed analysis of modern scripting languages revealed several emerging trends in modern software (for e.g. use of multiple shared libraries, significantly smaller function bodies, more branchy code) that exercise the underlying system differently from traditional workloads and therefore make us reexamine the design of our future processors.
Dr. Éric Rutten received his PhD in 1990 and Habilitation in 1999 at University of Rennes, France, while doing his research at INRIA Rennes. He currently works at INRIA in Grenoble. His research interests are in the field of reactive systems, applied to real-time embedded systems or autonomic systems. He has experience in high-level design environments for control systems (e.g., automotive, avionics), based on formal methods and tools (e.g., synchronous languages). His present activities are on model-based control of adaptive and reconfigurable computing systems, at the different levels of hardware, operating system, middleware and software components. He is using control techniques, particularly discrete controller synthesis, integrated in the compilation of a reactive programming language, called BZR.
We target the domain of adaptive and reconfigurable computing systems, also called autonomic computing. They are characterized by their ability to switch between different modes w.r.t. application and functionality, mapping and deployment, or execution architecture. We approach the problem with a programming language supported approach: in a mixed imperative/declarative style, we describe possible behaviors imperatively, in the form of finite state automata, and we impose declarative contracts, in the form of Boolean expressions which are made invariant by control on the automata. The compilation uses techniques from discrete control theory to build closed-loop controllers of the adaptation, in order to enforce properties like mutual exclusion, or imposing or forbidding sequences of modes. This way, the system can react flexibly and safely to changes occurring in the environment or in the execution platform. We concretely use this approach in reconfigurable component-based systems, in the coordination of administration loops, and in FPGA-based reconfigurable architectures.
Dr. Carlo Galuzzi received the M.Sc. in Mathematics (cum laude) from the Universitá degli studi di Milano in 2003. In 2004, he joined the Computer Engineering Group in Delft for his doctoral studies where he worked towards his PhD degree under the guidance of Prof. Stamatis Vassiliadis. From May 2009, he became a post-doctoral researcher in the same group. His research work includes hardware-software partitioning, instruction-set extension methodologies, reconfigurable computing, and graph theory. He is and he has been involved in the organization of many conferences, including MICRO, ICCD, and SAMOS. Carlo received the best paper award at ARC 2008
Keynote: Fused Instructions for the Customisation of the Instruction-Set of Reconfigurable Architectures
The extension of a given instruction-set architecture with specialised instructions has become a common technique used to optimise the execution of applications on different architectures. By identifying computationally intensive portions of an application to be partitioned in segments of code to execute in software and segments of code to execute in hardware, the execution of an application can be considerably speeded up and optimised. Each segments of code implemented in hardware can then be seen as a specialised application- or domain-specific instruction extending a given instruction-set. In this presentation, I will describe various techniques for the automatic identification and selection of complex application-specific instructions used to speed up the execution of applications on reconfigurable architectures. The instructions are generated via multiple clustering steps starting from single-output instructions further combined in multiple-output instructions following different policies in terms of computational complexity, type of instructions, type of applications, level of parallelism, etc. Although a number of approaches have been proposed in both academia and industry, the proposed solutions usually have a high computational complexity. The methodologies described in this presentation provide quality solutions at a limited computational complexity and, compared with existing techniques, the new instructions are atomically executable in hardware by construction, whereas existing approaches further increase the computational complexity by testing each generated instruction.
Dr. Achim Rettberg was born in Einbeck, Germany. He received his M.S. (Dipl.-Inform.) in computer science and economics in 1997 and his Ph. D. (Dr. rer. nat.) degree in 2006 from the University of Paderborn, Germany. where he studied computer science and economics. He graduated in 1997. From 1992 until 1997 he was employed as a working student for the University of Paderborn and C-LAB. From 1997 until 2000 he worked at C-LAB in industrial projects together with dSPACE and Siemens. From 2001 until 2006 he worked as a Ph.D. student and researcher for the C-LAB in the field of embedded system design. Afterwards he worked from 2007 until 2008 as Post-Doc at C-LAB and managed EU-Projects. In 2008 he became professor of complex integrated systems/embedded systems at the Computer Science department at Carl von Ossietzky University Oldenburg. Prof. Rettberg is founder and General Chair of the International Embedded Systems Symposium (IESS). Furthermore, he is active in several conference/workshop committees and reviewers for journals. Prof. Rettberg is author and co-author of several scientific books, journal articles and conference papers. His general research interests are model-based design, real-time systems and HW/SW architectures. He is Chair of IFIP working group 10.2 "Embedded Systems". In 2013 Prof. Rettberg is General Chair of ESLSyn, ISORC and IESS.
Today embedded system design has to cover the increasing complexity and has to fulfil requirements. With traditional design methods the time-to-market is to long. New design methods as model-based design offers the reduction of product development time, but it requires a different development process. This talk will give an overview of model-based design and show the complexity designers have to cope with. The idea to realize the system based on a virtual platform will also be covered in the talk. The reference technology platform (RTP) proposed and developed at OFFIS Institute (Oldenburg, Germany) will be presented. The RTP gives the designer an excellent overview of the system and allows requirement coverage and analysis. The RTP is used in several projects, like the BMBF funded project ARAMIS. Early results from this project will be presented.