1. Acceleration of Machine Learning Algorithms on FPGAs for High-Performance Computing: From Basics to Advanced
Date: 24/11
Time Slot: 08:30–10:30
Proponents: Franklin Tomich (UFOP, Brazil), Luan Machado (UFOP, Brazil), Tatiana G. da Silva Ribeiro (UFV, Brazil), Rafael Resende Soares (UFV, Brazil), Gean Augusto Lino de Oliveira (UFV, Brazil), Ricardo dos Santos Ferreira (UFV, Brazil) (UFV, Brazil), Racyus Pacífico (UFOP, Brazil), Lucas Bragança (UFV, Brazil)
Speaker: Dr. Racyus Delano Garcia Pacífico

Biography: Racyus Delano Garcia Pacífico holds a Ph.D. in Computer Science (2023) from the Federal University of Minas Gerais (UFMG) and an M.Sc. in Computer Science (2016) from the Federal University of Viçosa (UFV). He has been a professor at the Federal University of Ouro Preto (UFOP) since 2025 and currently serves in the Department of Computing (DECOM). His research interests include computer networks, computer architecture, FPGAs, GPUs, embedded systems and IoT, high-performance computing, and hardware accelerators for programmable networks, machine learning, and artificial intelligence. E-mail: racyus.pacifico at ufop.edu.br."

Abstract:
The growing demand for Artificial Intelligence (AI) and Machine Learning (ML) applications in High-Performance Computing (HPC) environments has driven the adoption of hardware accelerators. Among these technologies, Field-Programmable Gate Arrays (FPGAs) stand out for their high processing capabilities and reconfigurability, making them an attractive alternative to CPUs and GPUs for various ML applications. This course provides a practical introduction to the development of ML accelerators on FPGAs using High-Level Synthesis (HLS), enabling FPGA programming through C/C++ code. As a case study, implementations of the K-means algorithm and its variants will be explored, with a focus on optimization techniques for HPC.

2. Aidge: an open-source and collaborative framework for designing, optimizing, and deploying embedded AI
Date: 25/11
Time Slot: 08:30–10:30
Proponents: Iryna de Albuquerque Silva (CEA, France), Axel Farrugia (CEA, France), Filipo Perotto (ONERA, France), Antonio Pereira (CEA, France)

Abstract:

Embedded AI is currently one of the most dynamic and strategically important areas of research and development. Having a platform that is open-source, transparent (“white-box”), and interoperable with other tools in the design and deployment flow of ML algorithms is essential to enable reproducibility, accelerate innovation, and foster collaboration between academia and industry. Aidge addresses this need by providing a development framework for researchers, students, and industrial actors working on efficient, explainable, and portable AI solutions for embedded and edge applications. This hands-on tutorial will be of particular interest to participants involved in AI/ML design automation, embedded software-hardware co-design, and open-source toolchain integration. It is expected to attract participants interested in manipulating, optimizing, and exporting neural networks. The intended audience may include students, researchers, engineers from industry, and AI enthusiasts or curious learners interested in practical tools for edge and embedded AI. Attendees may value a tool that is under active development, offering a wide range of accessory functionalities and the flexibility to support specialized requirements (e.g., custom code generation for specific hardware targets).